Sr. Signal Integrity / Power Integrity Engineer

Salary: $159,300 - 159,300 per year Requirements: We need strong SI fundamentals and solid analytical capability in signal and power integrity. We need hands-on experience with simulation tools such as ADS, MATLAB, Cadence, HFSS, and similar platforms. We need proficiency in high-speed channel simulation, including system-level modeling and validation. We need experience with PCIe protocols and equalization techniques such as DFE, CTLE, and FFE. We need knowledge of clock distribution and jitter analysis for high-speed designs. We need expertise in PCB layout and board manufacturing processes, including spotting and addressing potential issues. We need practical experience in stack-up design, including dielectric material selection, impedance control, and layer optimization. Preferred experience includes power integrity analysis and PDN optimization. Preferred familiarity includes high-speed design compliance testing and validation methods. Preferred knowledge includes EMC/EMI mitigation techniques. Responsibilities: We perform end-to-end high-speed channel simulations to verify signal integrity across complex designs. We conduct SI/PI analysis to improve PCB layouts and reduce losses and signal degradation. We use simulation tools such as ADS, MATLAB, Cadence, HFSS, and others to assess performance and investigate issues. We work with PCIe protocols and equalization techniques, including DFE, CTLE, and FFE, to tune high-speed interfaces. We analyze clock distribution and jitter to maintain timing and signal integrity across designs. We collaborate with PCB layout and hardware design teams to define effective stack-ups and balance manufacturing feasibility with performance. We identify and reduce PCB manufacturing issues to support high yield and reliability. We partner closely with hardware design, validation, and product engineering teams to align on requirements and trade-offs. Technologies: AWS Hardware Support Machine Learning Matlab PCIe Cloud Network Web More: We are Annapurna Labs within AWS, designing silicon and software that accelerate innovation and help customers tackle challenges that were unimaginable until recently. We are seeking a Senior SI/PI Engineer to contribute to the definition, design, and validation of AWS next-generation machine learning ASICs, with the opportunity to shape SI topics for customized platforms in AWS datacenters. Our team values knowledge-sharing, mentorship, career growth, inclusion, work-life harmony, and diverse experiences. This role is based in Austin, TX, and the posting mentions a base salary range of 159,300.00 USD annually, along with sign-on payments, restricted stock units, and comprehensive benefits including health coverage, 401(k) matching, paid time off, and parental leave. last updated 37 week of 2026